Coding issues

1. Add SOP-to-decomp function to support SIS libraries.
2. Add support or writing VHDL type output files.
3. Finish input permutation code.
4. Add logic check to ensure gC gates do not have a shorted stack.
5. Add code to remove zero cost buffers from the covered netlist.
6. Add code to insert buffer delays where mono hazards exist.
7. Add code to determine if a reported hazard is true or false.
8. Modify cge.acc code so the cge is computed from my decomposition.
9. Unwinding zones and/or using POSETS in timed hazard checking.
10. Code to do timed hazard checking with level-based events.
11. Code to put an x in the coloring after a hazard is detected.

Thesis issues

General

Introduction

1. Expand on references.
2. Finish the Timed Circuits section.
3. Get hard copies of references.

Semantics

1. Incorporate Figures and prose for the half circuit.

Verification

ICCAD issues

1. Determine conference costs and funding sources.
2. Submit travel grant application.
3. Prepare presentation.

Techcon/SRC issues

1. Prepare presentation.
2. Make poster.
3. Verify flight schedule.

Other issues

1. Talk to Marge Jensen.
2. Set defense date.