CS/EE 5750/6750
Asynchronous Circuit Design


Course description

In recent years, there has been a resurgence of interest in the design of asynchronous circuits due to their ability to eliminate clock skew problems, achieve average case performance, adapt to environmental and processing variations, provide component modularity, and lower system power requirements. There is, however, a widely held belief that asynchronous design is difficult and leads to inefficient and unreliable designs. The goal of this course is to dispel this belief by introducing a systematic approach to the design of asynchronous VLSI systems from a high-level specification to an efficient and reliable circuit implementation. This course will include both hands-on experience with existing CAD tools as well as learn the algorithms within them. There will be weekly homeworks and a final project. Topics will include: specification, synthesis, optimization with timing information, performance analysis, and verification.

Instructor

Dr. Chris Myers
myers@vlsigroup.elen.utah.edu
Office: MEB 4112
Telephone: 581-6490

Textbooks

The textbook is being written by me during the course.

Meeting Times

Class Lecture 3:30 - 4:50 Monday and Wednesday Dr. Myers Mil Sci 208
Office Hours 2:00 - 3:30 Monday Dr. Myers MEB 4112
Office Hours 3:30 - 5:00 Tuesday Dr. Myers MEB 4112

Handouts

Lectures

Related Web Pages