CS/EE 3710
Computer Design Laboratory


Course description

This course applies knowledge of digital logic and computer architecture to the design and implementation of a microprocessor. Students will be given benchmark programs and asked to design a microprocessor which will execute them efficiently. Students are taught the VHDL hardware description language as a way to specify and simulate alternative architectures for their microprocessor. From the final VHDL specification, an FPGA implementation will be synthesized.

Teaching staff

Instructor: Dr. Chris Myers
Teaching assistant: Ron Lenk


For this course, you will need a book on VHDL. I will be roughly following the VHDL Starter's Guide by Sudhaker Yalamanchili. For someone who plans to use VHDL professionally, I recommend Peter Ashenden's The Designer's Guide to VHDL. You are free to use any VHDL book which looks appropriate for you. I have several in my office, if you would like to check them out.

Meeting Times

Class Lecture 9:10am - 10:30am Tuesday and Thursday Dr. Myers EMCB 105
Office Hours 10:30am - noon Tuesday and Thursday Dr. Myers MEB 4140
Office Hours 8am - 10:30am, 2pm - 4:30pm Monday and Wednesday Ron Lenk EMCB 210
Office Hours 1pm - 3:30pm Tuesday and Thursday Ron Lenk EMCB 210

Labs & Projects

Labs should be turned into the EE locker located in MEB just North-East of the main EE office. Labs will be graded and returned in class within one week. There is no provision for turning in late labs or projects. All labs are assumed to be correctly graded one week after they are returned. If you have a question regarding you grade, please contact the TA to address the issue. If there are any questions on grading, they must be addressed within one week of receiving a graded assignment. After the one week has lapsed, no changes will be considered.

All files are in a pdf format. These can be viewed and printed using Adobe's Acrobat Reader.




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