1) This board only has wires from the Xilinx chip to the edge connector. 2) This board has all of the necessary hardware to test the design along with the Xilinx chip. It is configured to be able to run in the edge connector or flag on its back in the normal connector. 3) This board is designed to only work on its back in the normal connectors. Therefore, this board can use pin 17 on the Xilinx board. It doesn't care about the edge connectors.