When I compile the ADSUB8 and M2_1, both of which contain And2B1 gates, I get the following error message:
76: port map(
[Error] Illegal port map: component AND2B1 does not have ports
When I click on the error the file says it expects ports from the And gate. The vhd file I have doesn't have the usual port information in the other AND and OR gates.
Do I need another AND2B1 vhd file? Where can I get the original?
I had no trouble compling the addsub8 Monday night, but when I got in Tuesday morning I got this bloody error.
Any help would be appreciated.