vc comp -uns_vis -k87 U:\cs3700\project\EPROM\classio.vhd
VeriBest VHDL Compiler - 15.00.00.45
Compiling Package Declaration CLASSIO
Compiling Package Body CLASSIO
[Failure] Syntax error : received 'case'
while expecting COMMENT
or 'architecture' or 'configuration' or 'entity' or 'library'
or 'package' or 'use'
I am not exactly sure what this is trying to tell me or how to fix it. I have got the newest project essesntials files from the web page.
Any help would be greatly appreciated...