--\begin{algorithm}
--\small
-- winery.vhd
library ieee;
use ieee.std_logic_1164.all;
use work.nondeterminism.all;
use work.channel.all;

entity winery is
  port(wine_shipping:inout channel:=init_channel);
end winery;

architecture behavior of winery is 
  signal bottle:std_logic_vector(2 downto 0):="000";
begin
winery:process
begin
  --@synthesis_off
  bottle <= selection(8,3);
  wait for delay(5,10);
  --@synthesis_on
  send(wine_shipping,bottle);
end process winery;
end behavior;
--\end{algorithm}