This paper describes the systematic synthesis and implementation of
a signal-type asynchronous data communication mechanism (ACM).
Such an ACM can be used in systems where a data-driven (``lazy'')
logic must be interfaced with a time-driven (``busy'') environment.
A new classification system for ACMs is introduced. The definition
of the signal ACM (called simply ``Signal'') is refined using Petri
net techniques. From the result of this refinement, a basic state
graph specification of a two-slot Signal is derived which is used
to generate a Petri net specification of the target ACM. A hardware
implementation is then generated using Cadence. Simulation results
show that the hardware does conform to the definitions and
specifications. The techniques employed in this work are potentially
useful in the development of an automated process of synthesising
similar systems.
