Chris J. Myers received the B.S. degree in electrical engineering and Chinese history in 1991 from the California Institute of Technology, Pasadena, CA, and the M.S.E.E. and Ph.D. degrees from Stanford University, Stanford, CA, in 1993 and 1995, respectively. He is an Associate Professor in the Department of Electrical and Computer Engineering, University of Utah, Salt Lake City, UT. His current research interests are innovative architectures for high performance and low power, algorithms for the computer-aided analysis and design of real-time concurrent systems, analog error control decoders, formal verification, and asynchronous circuit design. Dr. Myers received an NSF Fellowship in 1991, an NSF CAREER award in 1996, and a best paper award at Async99.