CS 361 -- Digital Design
Lab 8 -- Finite State Controller, Datapath, Xilinx Parts
Pre-lab State Diagram Check-Off due in lab week of December 1st.
Lab documentation due via electronic 361handin on Friday, December 12th (last day of class)

• Overview
  • Working With a Partner
• Triscuit's Instruction Set
  • Execution Model
• Example Programs
  • Running Sum
  • Decrement Until 0
• Triscuit's Data Path
• Triscuit's Control State Machine
  • Triscuit's Memory
  • Triscuit's Clock
• Procedure
• Using the Xilinx Parts
• Structuring Your Circuit
• Partitioning Across Multiple Boards
• Procedure
• Xilinx Software
• Timing Simulation
• Wiring the Xilinx Chip
• Checkpoint
• Final Documentation and Demo
• About this document ...